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MICRO
1997
IEEE
108views Hardware» more  MICRO 1997»
15 years 6 months ago
Improving the Accuracy and Performance of Memory Communication Through Renaming
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
Gary S. Tyson, Todd M. Austin
CW
2005
IEEE
15 years 3 months ago
Using a Floating Origin to Improve Fidelity and Performance of Large, Distributed Virtual Worlds
Large Virtual Worlds (VWs) are increasingly common in the computer graphics areas of simulation, games, geospatial or scientific visualisation. In such VWs, simulated motion of th...
Chris Thorne
FAST
2010
15 years 4 months ago
I/O Deduplication: Utilizing Content Similarity to Improve I/O Performance
Duplication of data in storage systems is becoming increasingly common. We introduce I/O Deduplication, a storage optimization that utilizes content similarity for improving I/O p...
Ricardo Koller, Raju Rangaswami
DATE
2006
IEEE
112views Hardware» more  DATE 2006»
15 years 8 months ago
Simultaneously improving code size, performance, and energy in embedded processors
Code size and energy consumption are critical design concerns for embedded processors as they determine the cost of the overall system. Techniques such as reduced length instructi...
Ahmad Zmily, Christos Kozyrakis
CGO
2003
IEEE
15 years 7 months ago
Dynamic Binary Translation for Accumulator-Oriented Architectures
A dynamic binary translation system for a co-designed virtual machine is described and evaluated. The underlying hardware directly executes an accumulator-oriented instruction set...
Ho-Seop Kim, James E. Smith