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SSDBM
2005
IEEE
132views Database» more  SSDBM 2005»
15 years 3 months ago
Co-Scheduling of Computation and Data on Computer Clusters
Scientific investigations have to deal with rapidly growing amounts of data from simulations and experiments. During data analysis, scientists typically want to extract subsets o...
Alexandru Romosan, Doron Rotem, Arie Shoshani, Der...
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 1 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
CGO
2004
IEEE
15 years 1 months ago
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan d...
ICS
2003
Tsinghua U.
15 years 2 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
TES
2001
Springer
15 years 2 months ago
Security for Distributed E-Service Composition
Current developments show that tomorrow’s information systems and applications will no longer be based on monolithic architectures that encompass all the functionality. Rather, t...
Stefan Seltzsam, Stephan Börzsönyi, Alfo...