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ICPP
2008
IEEE
15 years 7 months ago
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Xin Fu, Wangyuan Zhang, Tao Li, José A. B. ...
111
Voted
EUROPAR
1999
Springer
15 years 4 months ago
Annotated Memory References: A Mechanism for Informed Cache Management
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...
FDG
2009
ACM
15 years 5 months ago
Affective game engines: motivation and requirements
The tremendous advances in gaming technologies over the past decade have focused primarily on the physical realism of the game environment and game characters, and the complexity ...
Eva Hudlicka
POPL
2011
ACM
14 years 3 months ago
Safe nondeterminism in a deterministic-by-default parallel language
A number of deterministic parallel programming models with strong safety guarantees are emerging, but similar support for nondeterministic algorithms, such as branch and bound sea...
Robert L. Bocchino Jr., Stephen Heumann, Nima Hona...
110
Voted
TROB
2008
97views more  TROB 2008»
15 years 14 days ago
Physical Path Planning Using a Pervasive Embedded Network
Abstract--We evaluate a technique that uses an embedded network deployed pervasively throughout an environment to aid robots in navigation. The embedded nodes do not know their abs...
Keith J. O'Hara, Daniel B. Walker, Tucker R. Balch