The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...
The tremendous advances in gaming technologies over the past decade have focused primarily on the physical realism of the game environment and game characters, and the complexity ...
A number of deterministic parallel programming models with strong safety guarantees are emerging, but similar support for nondeterministic algorithms, such as branch and bound sea...
Robert L. Bocchino Jr., Stephen Heumann, Nima Hona...
Abstract--We evaluate a technique that uses an embedded network deployed pervasively throughout an environment to aid robots in navigation. The embedded nodes do not know their abs...
Keith J. O'Hara, Daniel B. Walker, Tucker R. Balch