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CHES
2006
Springer
152views Cryptology» more  CHES 2006»
15 years 8 months ago
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
In recent years, some countermeasures against Differential Power Analysis (DPA) at the logic level have been proposed. At CHES 2005 conference, Popp and Mangard proposed a new coun...
Daisuke Suzuki, Minoru Saeki
IAT
2008
IEEE
15 years 11 months ago
Evolving Logic Programming Based Agents with Temporal Operators
Logic Programming Update Languages were proposed as an extension of logic programming, which allow for modelling the dynamics of knowledge bases where both extensional knowledge (...
José Júlio Alferes, Alfredo Gabaldon...
FOIKS
2004
Springer
15 years 9 months ago
Implementing Ordered Choice Logic Programming using Answer Set Solvers
Abstract. Ordered Choice Logic Programming (OCLP) allows for dynamic preference-based decision-making with multiple alternatives without the need for any form of negation. This com...
Marina De Vos
GLVLSI
2002
IEEE
135views VLSI» more  GLVLSI 2002»
15 years 9 months ago
Low swing dual threshold voltage domino logic
A low swing domino logic technique is proposed to decrease power consumption without sacrificing noise immunity. With the proposed low swing domino logic circuit technique, active...
Volkan Kursun, Eby G. Friedman
ARVLSI
2001
IEEE
289views VLSI» more  ARVLSI 2001»
15 years 8 months ago
A High-Performance 64-bit Adder Implemented in Output Prediction Logic
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
Sheng Sun, Larry McMurchie, Carl Sechen