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SIGSOFT
2010
ACM
15 years 2 months ago
An effective dynamic analysis for detecting generalized deadlocks
We present an effective dynamic analysis for finding a broad class of deadlocks, including the well-studied lock-only deadlocks as well as the less-studied, but no less widespread...
Pallavi Joshi, Mayur Naik, Koushik Sen, David Gay
DAC
2004
ACM
16 years 5 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
CF
2011
ACM
14 years 4 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
16 years 4 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
TPLP
2002
117views more  TPLP 2002»
15 years 3 months ago
On Properties of Update Sequences Based on Causal Rejection
In this paper, we consider an approach to update nonmonotonic knowledge bases represented as extended logic programs under the answer set semantics. In this approach, new informat...
Thomas Eiter, Michael Fink, Giuliana Sabbatini, Ha...