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EDCC
2005
Springer
15 years 9 months ago
PathCrawler: Automatic Generation of Path Tests by Combining Static and Dynamic Analysis
Abstract. We present the PathCrawler prototype tool for the automatic generation of test-cases satisfying the rigorous all-paths criterion, with a user-defined limit on the number...
Nicky Williams, Bruno Marre, Patricia Mouy, Muriel...
129
Voted
ICES
2005
Springer
177views Hardware» more  ICES 2005»
15 years 9 months ago
Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
Andres Upegui, Eduardo Sanchez
TSD
2004
Springer
15 years 9 months ago
Dynamic Unit Selection for Very Low Bit Rate Coding at 500 bits/sec
This paper presents a new unit selection process for Very Low Bit Rate speech encoding around 500 bits/sec. The encoding is based on speech recognition and speech synthesis technol...
Marc Padellini, François Capman, Genevi&egr...
241
Voted
ICCAD
2003
IEEE
325views Hardware» more  ICCAD 2003»
15 years 9 months ago
Hardware Scheduling for Dynamic Adaptability using External Profiling and Hardware Threading
While performance, area, and power constraints have been the driving force in designing current communication-enabled embedded systems, post-fabrication and run-time adaptability ...
Brian Swahn, Soha Hassoun
ISLPED
2003
ACM
142views Hardware» more  ISLPED 2003»
15 years 9 months ago
Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
David Nguyen, Abhijit Davare, Michael Orshansky, D...