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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
16 years 1 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
RTAS
2008
IEEE
15 years 10 months ago
Real-Time Dynamic Power Management through Device Forbidden Regions
Dynamic Power Management (DPM) techniques are crucial in minimizing the overall energy consumption in real-time embedded systems. The timing constraints of real-time applications ...
Vinay Devadas, Hakan Aydin
ACSAC
2007
IEEE
15 years 10 months ago
Improving Signature Testing through Dynamic Data Flow Analysis
The effectiveness and precision of network-based intrusion detection signatures can be evaluated either by direct analysis of the signatures (if they are available) or by using bl...
Christopher Kruegel, Davide Balzarotti, William K....
139
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ICCCN
2007
IEEE
15 years 10 months ago
An Energy-Efficient Scheduling Algorithm Using Dynamic Voltage Scaling for Parallel Applications on Clusters
In the past decade cluster computing platforms have been widely applied to support a variety of scientific and commercial applications, many of which are parallel in nature. Howev...
Xiaojun Ruan, Xiao Qin, Ziliang Zong, Kiranmai Bel...
DATE
2006
IEEE
171views Hardware» more  DATE 2006»
15 years 10 months ago
Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off
We present a dynamic bit-width adaptation scheme in DCT applications for efficient trade-off between image quality and computation energy. Based on sensitivity differences of 64 ...
Jongsun Park, Jung Hwan Choi, Kaushik Roy