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» Dynamic Memory Design for Low Data-Retention Power
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MICRO
2009
IEEE
129views Hardware» more  MICRO 2009»
16 years 3 days ago
In-network coherence filtering: snoopy coherence without broadcasts
With transistor miniaturization leading to an abundance of on-chip resources and uniprocessor designs providing diminishing returns, the industry has moved beyond single-core micr...
Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
COMPUTER
2002
103views more  COMPUTER 2002»
15 years 5 months ago
SimpleScalar: An Infrastructure for Computer System Modeling
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
Todd M. Austin, Eric Larson, Dan Ernst
CODES
2005
IEEE
15 years 11 months ago
Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...
Anthony Leroy, Paul Marchal, Adelina Shickova, Fra...
SAINT
2005
IEEE
15 years 11 months ago
Adaptive Semantic Support Provisioning in Mobile Internet Environments
The Mobile Internet scenario encourages the design and development of context-aware applications that provide results depending on context information, such as the relative positi...
Antonio Corradi, Rebecca Montanari, Alessandra Ton...
ANSOFT
2002
126views more  ANSOFT 2002»
15 years 5 months ago
The Real-Time Process Algebra (RTPA)
Abstract. The real-time process algebra (RTPA) is a set of new mathematical notations for formally describing system architectures, and static and dynamic behaviors. It is recogniz...
Yingxu Wang