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» Dynamic Path Reduction for Software Model Checking
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ISCA
1997
IEEE
90views Hardware» more  ISCA 1997»
15 years 4 months ago
The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems
Current microprocessors aggressively exploit instructionlevel parallelism (ILP) through techniques such as multiple issue, dynamic scheduling, and non-blocking reads. Recent work ...
Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abd...
94
Voted
PEPM
2010
ACM
15 years 9 months ago
Conditional weighted pushdown systems and applications
Pushdown systems are well understood as abstract models of programs with (recursive) procedures. Reps et al. recently extended pushdown systems into weighted pushdown systems, whi...
Xin Li, Mizuhito Ogawa
CSL
2004
Springer
15 years 5 months ago
Moving in a Crumbling Network: The Balanced Case
In this paper we continue the study of ‘sabotage modal logic’ SML which was suggested by van Benthem. In this logic one describes the progression along edges of a transition gr...
Philipp Rohde
125
Voted
HIPC
2007
Springer
15 years 4 months ago
Accomplishing Approximate FCFS Fairness Without Queues
First Come First Served (FCFS) is a policy that is accepted for implementing fairness in a number of application domains such as scheduling in Operating Systems, scheduling web req...
K. Subramani, Kamesh Madduri
102
Voted
IEICET
2006
114views more  IEICET 2006»
15 years 12 days ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...