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JSA
2000
116views more  JSA 2000»
15 years 1 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
ASPLOS
2008
ACM
15 years 4 months ago
Adapting to intermittent faults in multicore systems
Future multicore processors will be more susceptible to a variety of hardware failures. In particular, intermittent faults, caused in part by manufacturing, thermal, and voltage v...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
EUROSYS
2008
ACM
15 years 11 months ago
Eudaemon: involuntary and on-demand emulation against zero-day exploits
Eudaemon is a technique that aims to blur the borders between protected and unprotected applications, and brings together honeypot technology and end-user intrusion detection and ...
Georgios Portokalidis, Herbert Bos
ASPLOS
2004
ACM
15 years 7 months ago
HIDE: an infrastructure for efficiently protecting information leakage on the address bus
+ XOM-based secure processor has recently been introduced as a mechanism to provide copy and tamper resistant execution. XOM provides support for encryption/decryption and integrit...
Xiaotong Zhuang, Tao Zhang, Santosh Pande
CF
2010
ACM
15 years 7 months ago
Interval-based models for run-time DVFS orchestration in superscalar processors
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
Georgios Keramidas, Vasileios Spiliopoulos, Stefan...