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ICPP
2003
IEEE
15 years 7 months ago
Enabling Partial Cache Line Prefetching Through Data Compression
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
Youtao Zhang, Rajiv Gupta
137
Voted
MSE
2000
IEEE
174views Hardware» more  MSE 2000»
15 years 6 months ago
Integrating a Digital Camera in the Home Environment: Architecture and Prototype
Electronic photography is gaining parts of the photography market and tends to replace gradually all argentic photography. The combination of digital camera and computer technolog...
Nadia Bennani
VL
2000
IEEE
130views Visual Languages» more  VL 2000»
15 years 6 months ago
SALSA and ALVIS: A Language and System for Constructing and Presenting Low Fidelity Algorithm Visualizations
Computer science educators have traditionally used algorithm visualization (AV) software to create graphical representations of algorithms that are later used as visual aids in le...
Christopher D. Hundhausen, Sarah A. Douglas
COMPSAC
2001
IEEE
15 years 5 months ago
Exception Handling in Component-Based System Development
Designers of component-based software face two problems related to dealing with abnormal events: developing exception handling at the level of the integrated system and accommodat...
Alexander B. Romanovsky
SBACPAD
2004
IEEE
97views Hardware» more  SBACPAD 2004»
15 years 3 months ago
IATO: A Flexible EPIC Simulation Environment
High-performance superscalar processors are designed with the help of complex simulation environment. The simulation infrastructure permits to validate the processor instruction s...
Amaury Darsch, André Seznec