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74
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ISCA
2000
IEEE
99views Hardware» more  ISCA 2000»
15 years 1 months ago
Transient fault detection via simultaneous multithreading
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
Steven K. Reinhardt, Shubhendu S. Mukherjee
SAS
2000
Springer
149views Formal Methods» more  SAS 2000»
15 years 1 months ago
FULLDOC: A Full Reporting Debugger for Optimized Code
As compilers increasingly rely on optimizations to achieve high performance, the effectiveness of source level debuggers for optimized code continues to falter. Even if values of s...
Clara Jaramillo, Rajiv Gupta, Mary Lou Soffa
95
Voted
ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
14 years 9 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
CORR
2011
Springer
209views Education» more  CORR 2011»
14 years 4 months ago
Aneka Cloud Application Platform and Its Integration with Windows Azure
Aneka is an Application Platform-as-a-Service (Aneka PaaS) for Cloud Computing. It acts as a framework for building customized applications and deploying them on either public or ...
Yi Wei, Karthik Sukumar, Christian Vecchiola, Dile...
SPAA
2012
ACM
12 years 12 months ago
Memory-mapping support for reducer hyperobjects
hyperobjects (reducers) provide a linguistic abstraction for dynamic multithreading that allows different branches of a parallel program to maintain coordinated local views of the...
I.-Ting Angelina Lee, Aamir Shafi, Charles E. Leis...