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118
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CODES
2004
IEEE
15 years 6 months ago
2004
IEEE
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
133
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CIG
2005
IEEE
15 years 8 months ago
2005
IEEE
A newly designed game is introduced, which feels like Backgammon, but has a simplified rule set. Unlike earlier attempts at simplifying the game, Nannon maintains enough features a...
119
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TASE
2008
IEEE
15 years 2 months ago
2008
IEEE
This paper addresses the general single-machine earliness-tardiness problem with distinct release dates, due dates, and unit costs. The aim of this research is to obtain an exact n...
233
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EH
1999
IEEE
1999
IEEE
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
15 years 6 months ago
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
116
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SOFSEM
1997
Springer
15 years 6 months ago
1997
Springer
This paper surveys recent results in the area of virtual path layout in ATM networks. We present a model for the theoretical study of these layouts the model amounts to covering t...