74 search results - page 15 / 15 » Dynamic Reallocation of Functional Units in Superscalar Proc... |
3DPVT
2006
IEEE
14 years 9 days ago
2006
IEEE
In this work we propose a scanline optimization procedure for computational stereo using a linear smoothness cost model performed by programmable graphics hardware. The main idea ...
ECRTS
2007
IEEE
14 years 17 days ago
2007
IEEE
Conventionally, the use of virtual memory in real-time systems has been avoided, the main reason being the difficulties it provides to timing analysis. However, there is a trend ...
TVLSI
2010
13 years 28 days ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
ISCA
2002
IEEE
13 years 11 months ago
2002
IEEE
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...