1753 search results - page 235 / 351 » Dynamic Scan Scheduling |
160
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IPPS
2010
IEEE
15 years 1 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
123
Voted
SOSP
2003
ACM
16 years 4 days ago
2003
ACM
This paper presents Capriccio, a scalable thread package for use with high-concurrency servers. While recent work has advocated event-based systems, we believe that threadbased sy...
132
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PPOPP
2010
ACM
15 years 9 months ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
167
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ICYCS
2008
IEEE
15 years 9 months ago
2008
IEEE
— Nowadays wireless mesh routers are facilitating with more wireless channels than ever because of the advanced wireless communication technologies such as OFDM, SDR and CR(cogni...
175
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RTSS
1998
IEEE
15 years 7 months ago
1998
IEEE
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...