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DAC
2006
ACM
16 years 19 days ago
Optimal simultaneous mapping and clustering for FPGA delay optimization
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
Joey Y. Lin, Deming Chen, Jason Cong
VLSID
2007
IEEE
209views VLSI» more  VLSID 2007»
16 years 1 days ago
Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
Saraju P. Mohanty, Elias Kougianos
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
15 years 8 months ago
Simultaneous Shield and Buffer Insertion for Crosstalk Noise Reduction in Global Routing
We present a method for incorporating crosstalk reduction criteria into global routing under an innovative power supply architecture, while considering the constraints imposed by ...
Tianpei Zhang, Sachin S. Sapatnekar
ICC
2007
IEEE
15 years 6 months ago
INTELiCON: Intelligent Connectivity Framework for the Simultaneous Use of Multiple Interfaces
— Widespread deployment of Wi-Fi together with 3G upgrades to cellular networks is rapidly creating areas where multiple wireless IP technologies are accessible. WiMAX will furth...
Kyriakos Manousakis, Praveen Gopalakrishnan, Dave ...
SIGARCH
2008
97views more  SIGARCH 2008»
14 years 11 months ago
SP-NUCA: a cost effective dynamic non-uniform cache architecture
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...