Sciweavers

239 search results - page 24 / 48
» Dynamic Simultaneous Multithreaded Architecture
Sort
View
CG
2008
Springer
14 years 11 months ago
Parallel techniques for physically based simulation on multi-core processor architectures
As multi-core processor systems become more and more widespread, the demand for efficient parallel algorithms also propagates into the field of computer graphics. This is especial...
Bernhard Thomaszewski, Simon Pabst, Wolfgang Bloch...
SPLC
2008
15 years 1 months ago
An Architectural Discussion on DSPL
Dynamic Software Product Line (DSPL) engineering has proved itself as an efficient way to deal with run-time product adaptation. DSPLs have been successfully applied in domains su...
Carlos Cetina, Vicente Pelechano, Pablo Trinidad, ...
MICRO
2005
IEEE
107views Hardware» more  MICRO 2005»
15 years 5 months ago
Stream Programming on General-Purpose Processors
— In this paper we investigate mapping stream programs (i.e., programs written in a streaming style for streaming architectures such as Imagine and Raw) onto a general-purpose CP...
Jayanth Gummaraju, Mendel Rosenblum
APCSAC
2006
IEEE
15 years 5 months ago
Issues and Support for Dynamic Register Allocation
Abstract. Post-link and dynamic optimizations have become important to achieve program performance. A major challenge in post-link and dynamic optimizations is the acquisition of r...
Abhinav Das, Rao Fu, Antonia Zhai, Wei-Chung Hsu
DAC
2012
ACM
13 years 2 months ago
A QoS-aware memory controller for dynamically balancing GPU and CPU bandwidth use in an MPSoC
Diverse IP cores are integrated on a modern system-on-chip and share resources. Off-chip memory bandwidth is often the scarcest resource and requires careful allocation. Two of t...
Min Kyu Jeong, Mattan Erez, Chander Sudanthi, Nige...