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» Dynamic Simultaneous Multithreaded Architecture
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ISCA
1998
IEEE
139views Hardware» more  ISCA 1998»
15 years 1 months ago
Simultaneous Multithreading: Maximizing On-Chip Parallelism
This paper examines simultaneous multithreading, a technique permitting several independent threads to issue instructions to a superscalar's multiple functional units in a si...
Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
87
Voted
ISCA
1996
IEEE
102views Hardware» more  ISCA 1996»
15 years 1 months ago
Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle. In previous work we demonstrated the performance po...
Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, He...
77
Voted
MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
15 years 1 months ago
A Dynamic Multithreading Processor
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
Haitham Akkary, Michael A. Driscoll
94
Voted
CATA
2006
14 years 11 months ago
Understanding the Behavior of Simultaneous Multithreaded and Multiprocessor Architectures
Neither simulation results nor real system results give an explanation to the behavior of advanced computer systems for the full design spectrum. In this paper, we present simple ...
Nagi N. Mekhiel
ISPASS
2007
IEEE
15 years 3 months ago
An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures
Semiconductor transient faults (i.e. soft errors) have become an increasingly important threat to microprocessor reliability. Simultaneous multithreaded (SMT) architectures exploi...
Wangyuan Zhang, Xin Fu, Tao Li, José A. B. ...