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» Dynamic Simultaneous Multithreaded Architecture
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156
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ARCS
2012
Springer
13 years 9 months ago
Improving Cache Locality for Ray Casting with CUDA
Abstract: In this paper, we present an acceleration method for texture-based ray casting on the compute unified device architecture (CUDA) compatible graphics processing unit (GPU...
Yuki Sugimoto, Fumihiko Ino, Kenichi Hagihara
121
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ICPP
2008
IEEE
15 years 8 months ago
Taming Single-Thread Program Performance on Many Distributed On-Chip L2 Caches
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
Lei Jin, Sangyeun Cho
HPCA
2008
IEEE
16 years 2 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...
JOT
2007
124views more  JOT 2007»
15 years 1 months ago
Displaying Updated Stock Quotes
This paper describes how to extract stock quote data and display it with a dynamic update (using free, but delayed data streams). As a part of the architecture of the program, we ...
Douglas Lyon
SIGMETRICS
2002
ACM
15 years 1 months ago
Full-system timing-first simulation
Computer system designers often evaluate future design alternatives with detailed simulators that strive for functional fidelity (to execute relevant workloads) and performance fi...
Carl J. Mauer, Mark D. Hill, David A. Wood