239 search results - page 8 / 48 » Dynamic Simultaneous Multithreaded Architecture |
CPHYSICS
2010
14 years 9 months ago
2010
We present TFORM, the version of the symbolic manipulation system FORM that can make simultaneous use of several processors in a shared memory architecture. The implementation use...
HPCA
2005
IEEE
15 years 12 months ago
2005
IEEE
This paper introduces a novel technique which leverages value prediction and multithreading on a simultaneous multithreading processor to achieve higher performance in a single th...
ARC
2007
Springer
15 years 3 months ago
2007
Springer
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
We present Low Power Illinois scan architecture (LPILS) to achieve power dissipation and test data volume reduction, simultaneously. By using the proposed scan architecture, dynam...
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PSB
2001
15 years 1 months ago
2001
This paper discusses the issues involved in implementing a dynamic programming algorithm for biological sequence comparison on a generalpurpose parallel computing platform based o...