989 search results - page 152 / 198 » Dynamic Symmetry Reduction |
163
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ASPLOS
2008
ACM
15 years 6 months ago
2008
ACM
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
151
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ISCA
2010
IEEE
15 years 6 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
145
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CF
2005
ACM
15 years 6 months ago
2005
ACM
This paper evaluates how much extended dictionary-based code compression techniques can reduce the static code size. In their simplest form, such methods statically identify ident...
157
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ISPD
2007
ACM
15 years 5 months ago
2007
ACM
When VLSI technology scales toward 45nm, the lithography wavelength stays at 193nm. This large gap results in strong refractive effects in lithography. Consequently, it is a huge...
144
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ICCAD
2009
IEEE
15 years 2 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...