989 search results - page 179 / 198 » Dynamic Symmetry Reduction |
88
Voted
IJPP
2011
14 years 6 months ago
2011
With the advent of multi-core processors, desktop application developers must finally face parallel computing and its challenges. A large portion of the computational load in a p...
ICASSP
2011
IEEE
14 years 3 months ago
2011
IEEE
Traditional binary hypothesis testing relies on the precise knowledge of the probability density of an observed random vector conditioned on each hypothesis. However, for many app...
122
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SIGMETRICS
2011
ACM
14 years 2 months ago
2011
ACM
Threshold-based performance monitoring in large 3G networks is very challenging for two main factors: large network scale and dynamics in both time and spatial domains. There exis...
108
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DAC
2011
ACM
13 years 11 months ago
2011
ACM
Using device write buffers is a promising technique to improve the write performance of solid-state disks. The write buffer not only reduces the write traffic to the flash but als...
111
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NOCS
2007
IEEE
15 years 6 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...