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ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
15 years 4 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
ISCA
2010
IEEE
340views Hardware» more  ISCA 2010»
15 years 4 months ago
Necromancer: enhancing system throughput by animating dead cores
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
ISCA
2010
IEEE
204views Hardware» more  ISCA 2010»
15 years 4 months ago
Energy proportional datacenter networks
Numerous studies have shown that datacenter computers rarely operate at full utilization, leading to a number of proposals for creating servers that are energy proportional with r...
Dennis Abts, Michael R. Marty, Philip M. Wells, Pe...
HPDC
2002
IEEE
15 years 4 months ago
Multigrain Parallelism for Eigenvalue Computations on Networks of Clusters
Clusters of workstations have become a cost-effective means of performing scientific computations. However, large network latencies, resource sharing, and heterogeneity found in ...
James R. McCombs, Andreas Stathopoulos
INFOCOM
2002
IEEE
15 years 4 months ago
Optimal Configuration of OSPF Aggregates
—Open Shortest Path First (OSPF) is a popular protocol for routing within an autonomous system (AS) domain. In order to scale for large networks containing hundreds and thousands...
Rajeev Rastogi, Yuri Breitbart, Minos N. Garofalak...