Sciweavers

989 search results - page 105 / 198
» Dynamic Time Step Control Algorithm Enhancements
Sort
View
ISPD
2009
ACM
79views Hardware» more  ISPD 2009»
15 years 9 months ago
A routing approach to reduce glitches in low power FPGAs
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
Quang Dinh, Deming Chen, Martin D. F. Wong
141
Voted
ICTAI
2005
IEEE
15 years 8 months ago
Subgoal Ordering and Granularity Control for Incremental Planning
In this paper, we study strategies in incremental planning for ordering and grouping subproblems partitioned by the subgoals of a planning problem when each subproblem is solved b...
Chih-Wei Hsu, Yixin Chen
TMC
2010
167views more  TMC 2010»
14 years 9 months ago
Optimal Speed Control of Mobile Node for Data Collection in Sensor Networks
A data mule represents a mobile device that collects data in a sensor field by physically visiting the nodes in a sensor network. The data mule collects data when it is in the prox...
Ryo Sugihara, Rajesh K. Gupta
125
Voted
TVCG
2010
153views more  TVCG 2010»
15 years 24 days ago
Parallel View-Dependent Level-of-Detail Control
—We present a scheme for view-dependent level-of-detail control that is implemented entirely on programmable graphics hardware. Our scheme selectively refines and coarsens an ar...
Liang Hu, Pedro V. Sander, Hugues Hoppe
138
Voted
DAC
2004
ACM
16 years 3 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan