33 search results - page 5 / 7 » Dynamic Trace Selection Using Performance Monitoring Hardwar... |
115
click to vote
MICRO
2006
IEEE
15 years 10 months ago
2006
IEEE
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
137
click to vote
IEEEPACT
2007
IEEE
15 years 10 months ago
2007
IEEE
Distinguishing transient blocks from frequently used blocks enables servicing references to transient blocks from a small fully-associative auxiliary cache structure. By inserting...
161
click to vote
WINET
2010
15 years 2 months ago
2010
We consider a scenario where devices with multiple networking capabilities access networks with heterogeneous characteristics. In such a setting, we address the problem of effici...
137
click to vote
TAP
2008
Springer
15 years 4 months ago
2008
Springer
Pex automatically produces a small test suite with high code coverage for a .NET program. To this end, Pex performs a systematic program analysis (using dynamic symbolic execution,...
125
click to vote
DATE
2004
IEEE
15 years 8 months ago
2004
IEEE
Dynamic power management aims at extending battery life by switching devices to lower-power modes when there is a reduced demand for service. Static power management strategies can...