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INFOCOM
2008
IEEE
15 years 11 months ago
On Survivable Access Network Design: Complexity and Algorithms
Abstract— We consider the computational complexity and algorithm challenges in designing survivable access networks. With limited routing capability, the structure of an access n...
Dahai Xu, Elliot Anshelevich, Mung Chiang
ISVLSI
2003
IEEE
97views VLSI» more  ISVLSI 2003»
15 years 9 months ago
Q-Tree: A New Iterative Improvement Approach for Buffered Interconnect Optimization
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...
Andrew B. Kahng, Bao Liu
EH
2002
IEEE
105views Hardware» more  EH 2002»
15 years 9 months ago
Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic
The availability of SiGe HBT devices has opened the door for Gigahertz FPGAs. Speeds over 5GHz have been reported. However, to make the idea practical, serious power management an...
Channakeshav, Kuan Zhou, Russell P. Kraft, John F....
ASIAN
2000
Springer
156views Algorithms» more  ASIAN 2000»
15 years 8 months ago
Reusing Animations in Databases for Multimedia Presentations
Abstract. Multimedia presentations and their applications are becoming more and more popular in most spheres of industry and everyday life. A database approach could help in queryi...
Zhiyong Huang, Binjia Jiao, B. Prabhakaran, Conrad...
ISPD
1997
ACM
186views Hardware» more  ISPD 1997»
15 years 8 months ago
EWA: exact wiring-sizing algorithm
The wire sizing problem under inequality Elmore delay constraints is known to be posynomial, hence convex under an exponential variable-transformation. There are formal methods fo...
Rony Kay, Gennady Bucheuv, Lawrence T. Pileggi