39 search results - page 1 / 8 » Dynamic cache clustering for chip multiprocessors |
112
Voted
ICS
2009
Tsinghua U.
15 years 10 months ago
2009
Tsinghua U.
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
153
Voted
HIPEAC
2009
Springer
15 years 7 months ago
2009
Springer
This paper proposes and studies a hardware-based adaptive controlled migration strategy for managing distributed L2 caches in chip multiprocessors. Building on an area-efficient sh...
126
Voted
ISCA
1994
IEEE
15 years 7 months ago
1994
IEEE
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
204
Voted
CAL
2010
15 years 25 days ago
2010
This paper describes dynamic pressure-aware associative placement (DPAP), a novel distributed cache management scheme for large-scale chip multiprocessors. Our work is motivated by...
139
Voted
HPCA
2007
IEEE
15 years 9 months ago
2007
IEEE
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...