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» Dynamic hardware software partitioning: a first approach
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ECBS
2010
IEEE
209views Hardware» more  ECBS 2010»
15 years 4 months ago
Continuous Verification of Large Embedded Software Using SMT-Based Bounded Model Checking
The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall pr...
Lucas Cordeiro, Bernd Fischer 0002, João Ma...
JCM
2007
140views more  JCM 2007»
14 years 11 months ago
A Dynamic Scheduling Algorithm for Divisible Loads in Grid Environments
—Divisible loads are those workloads that can be partitioned by a scheduler into any arbitrary chunks. The problem of scheduling divisible loads has been defined for a long time,...
Nguyen The Loc, Said Elnaffar
ARC
2007
Springer
150views Hardware» more  ARC 2007»
15 years 3 months ago
MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Be...
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
15 years 1 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
SIGPLAN
2008
14 years 11 months ago
A parallel dynamic compiler for CIL bytecode
Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the pot...
Simone Campanoni, Giovanni Agosta, Stefano Crespi-...