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» Dynamic partial-order reduction for model checking software
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RE
2001
Springer
15 years 4 months ago
The Single Model Principle
at different levels of abstraction. There are two very different ways of using such languages. One approach is based on the manifestation of a single model, with construction of di...
Richard F. Paige, Jonathan S. Ostroff
ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
14 years 12 months ago
TurboTag: lookup filtering to reduce coherence directory power
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
Pejman Lotfi-Kamran, Michael Ferdman, Daniel Crisa...
LCPC
2004
Springer
15 years 5 months ago
Power-Aware Scheduling for Parallel Security Processors with Analytical Models
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq ...
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
16 years 2 days ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
ICECCS
2007
IEEE
154views Hardware» more  ICECCS 2007»
15 years 6 months ago
A light-weight static approach to analyzing UML behavioral properties
Identifying and resolving design problems in the early design phase can help ensure software quality and save costs. There are currently few tools for analyzing designs expressed ...
Lijun Yu, Robert B. France, Indrakshi Ray, Kevin L...