219 search results - page 33 / 44 » Dynamic partial-order reduction for model checking software |
SBMF
2009
Springer
15 years 6 months ago
2009
Springer
Abstract. This paper presents a case study on retrospective veri cation of the Linux Virtual File System (VFS), which is aimed at checking for violations of API usage rules and mem...
95
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FOSSACS
2007
Springer
15 years 5 months ago
2007
Springer
We study the complexity of satisfiability for the expressive extension ICPDL of PDL (Propositional Dynamic Logic), which admits intersection and converse as program operations. Ou...
DAC
2005
ACM
16 years 19 days ago
2005
ACM
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
114
Voted
ISCA
1999
IEEE
15 years 4 months ago
1999
IEEE
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
100
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WSC
1997
15 years 1 months ago
1997
Excellent production design and planning depends on accurate simulation of a high quality layout. A good layout project will always begin with an analysis of the production volume...