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LCTRTS
2009
Springer
15 years 6 months ago
Addressing the challenges of DBT for the ARM architecture
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
Ryan W. Moore, José Baiocchi, Bruce R. Chil...
83
Voted
ASPLOS
2008
ACM
15 years 1 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
92
Voted
DAC
2001
ACM
16 years 19 days ago
Dynamic Detection and Removal of Inactive Clauses in SAT with Application in Image Computation
In this paper, we present a new technique for the e cient dynamic detection and removal of inactive clauses, i.e. clauses that do not a ect the solutions of interest of a Boolean ...
Aarti Gupta, Anubhav Gupta, Zijiang Yang, Pranav A...
104
Voted
IJPP
2010
156views more  IJPP 2010»
14 years 9 months ago
ForestGOMP: An Efficient OpenMP Environment for NUMA Architectures
Exploiting the full computational power of current hierarchical multiprocessor machines requires a very careful distribution of threads and data among the underlying non-uniform ar...
François Broquedis, Nathalie Furmento, Bric...
DAC
1998
ACM
15 years 3 months ago
Buffer Insertion for Noise and Delay Optimization
Interconnect-driven optimization is an increasingly important step in high-performance design. Algorithms for buffer insertion have been successfully utilized to reduce delay in gl...
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay