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HPCA
2006
IEEE
15 years 10 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
ICSM
2002
IEEE
15 years 2 months ago
Run-time Evolution for Embedded Component-Oriented Systems
This position paper describes ongoing work in which the Java-based SEESCOA component system is extended with functionality for run-time evolution. First, an assessment is made of ...
Yves Vandewoude, Yolande Berbers
ICPPW
2008
IEEE
15 years 4 months ago
Performance Analysis and Optimization of Parallel Scientific Applications on CMP Cluster Systems
Chip multiprocessors (CMP) are widely used for high performance computing. Further, these CMPs are being configured in a hierarchical manner to compose a node in a cluster system....
Xingfu Wu, Valerie E. Taylor, Charles W. Lively, S...
115
Voted
HPDC
2008
IEEE
15 years 4 months ago
Harmony: an execution model and runtime for heterogeneous many core systems
The emergence of heterogeneous many core architectures presents a unique opportunity for delivering order of magnitude performance increases to high performance applications by ma...
Gregory F. Diamos, Sudhakar Yalamanchili
81
Voted
HPCA
1996
IEEE
15 years 1 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...