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ARC
2008
Springer
112views Hardware» more  ARC 2008»
15 years 3 months ago
Lossless Compression for Space Imagery in a Dynamically Reconfigurable Architecture
Abstract. This paper presents a novel dynamically reconfigurable hardware architecture for lossless compression and its optimization for space imagery. The proposed system makes us...
Xiaolin Chen, Cedric Nishan Canagarajah, Raffaele ...
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
15 years 7 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
119
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FPL
2006
Springer
95views Hardware» more  FPL 2006»
15 years 5 months ago
A Reconfigurable Functional Unit for an Adaptive Dynamic Extensible Processor
This paper presents a reconfigurable functional unit (RFU) for an adaptive dynamic extensible processor. The processor can tune its extended instructions to the target application...
Hamid Noori, Farhad Mehdipour, Kazuaki Murakami, K...
DATE
2006
IEEE
195views Hardware» more  DATE 2006»
15 years 7 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
TVLSI
2008
187views more  TVLSI 2008»
15 years 1 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...