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175
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ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 6 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāˆ’specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
FPL
2003
Springer
95views Hardware» more  FPL 2003»
15 years 7 months ago
Reconfigurable Hardware SAT Solvers: A Survey of Systems
By adapting to computations that are not so well supported by general-purpose processors, reconfigurable systems achieve significant increases in performance. Such computational sy...
Iouliia Skliarova, António de Brito Ferrari
DAC
2005
ACM
15 years 3 months ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro
IPPS
1998
IEEE
15 years 6 months ago
An Architecture for Network Resource Monitoring in a Distributed Environment
As part of its HiPer-D Program, the United States Navy is developing an experimental distributed system which achieves survivability by dynamically reconfiguring the system using ...
Philip M. Irey IV, Robert W. Hott, David T. Marlow
121
Voted
JVM
2004
103views Education» more  JVM 2004»
15 years 3 months ago
The Virtual Processor: Fast, Architecture-Neutral Dynamic Code Generation
Tools supporting dynamic code generation tend too be low-level (leaving much work to the client application) or too intimately related with the language/system in which they are u...
Ian Piumarta