541 search results - page 33 / 109 » Dynamically Reconfigurable Architecture for Image Processor ... |
152
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MICRO
2010
IEEE
15 years 1 months ago
2010
IEEE
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
145
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HPCA
2001
IEEE
16 years 4 months ago
2001
IEEE
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
133
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ARC
2008
Springer
15 years 6 months ago
2008
Springer
Reconfigurable architectures enable the hardware function to be implemented by the user and, due to its characteristics, have been used in many areas, including Bioinformatics. One...
139
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IEEEPACT
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
137
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IPPS
2000
IEEE
15 years 8 months ago
2000
IEEE
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...