Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...
An energy efficient object recognition processor is proposed for real-time visual applications. Its energy efficiency is improved by lowering average power consumption while susta...
Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim...
Camera 1 Camera 3 Camera 2 Controller Moving object FPGA PowerPC SDRAM Coprocessor Image Sensor SDRAM FlashRAM a) b) Many vision applications perform intensive computations and de...
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
The aim of the paper is to introduce general techniques in order to optimize the parallel execution time of sorting on a distributed architectures with processors of various speeds...