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176
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ASAP
2006
IEEE
15 years 10 months ago
2006
IEEE
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...
116
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ISLPED
2009
ACM
15 years 10 months ago
2009
ACM
An energy efficient object recognition processor is proposed for real-time visual applications. Its energy efficiency is improved by lowering average power consumption while susta...
146
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ERSA
2003
15 years 5 months ago
2003
Camera 1 Camera 3 Camera 2 Controller Moving object FPGA PowerPC SDRAM Coprocessor Image Sensor SDRAM FlashRAM a) b) Many vision applications perform intensive computations and de...
158
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RSP
2008
IEEE
15 years 10 months ago
2008
IEEE
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
119
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CORR
2006
Springer
15 years 4 months ago
2006
Springer
The aim of the paper is to introduce general techniques in order to optimize the parallel execution time of sorting on a distributed architectures with processors of various speeds...