541 search results - page 48 / 109 » Dynamically Reconfigurable Architecture for Image Processor ... |
151
click to vote
IPPS
2006
IEEE
15 years 10 months ago
2006
IEEE
Algorithmic skeletons can be used to write architecture independent programs, shielding application developers from the details of a parallel implementation. In this paper, we pre...
137
Voted
DAC
2009
ACM
16 years 5 months ago
2009
ACM
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
124
click to vote
ISCA
1999
IEEE
15 years 8 months ago
1999
IEEE
Future computing workloads will emphasize an architecture's ability to perform relatively simple calculations on massive quantities of mixed-width data. This paper describes ...
141
click to vote
ICIP
1998
IEEE
16 years 5 months ago
1998
IEEE
Optical flow estimation from image sequences has been for several years a mathematical process carried out by general purpose processors in no real time. In this work a specific a...
126
click to vote
DAC
2004
ACM
16 years 5 months ago
2004
ACM
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...