541 search results - page 69 / 109 » Dynamically Reconfigurable Architecture for Image Processor ... |
SAMOS
2005
Springer
15 years 7 months ago
2005
Springer
—We describe the generation of the simulation environment for the Sandbridge Sandblaster multithreaded processor. The processor model is described using the Sandblaster architect...
123
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HPCA
2002
IEEE
16 years 2 months ago
2002
IEEE
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requir...
ISCAS
2005
IEEE
15 years 7 months ago
2005
IEEE
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
116
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HPCA
2005
IEEE
16 years 2 months ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...
139
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SI3D
2006
ACM
15 years 7 months ago
2006
ACM
This paper studies jump flooding as an algorithmic paradigm in the general purpose computation with GPU. As an example application of jump flooding, the paper discusses a constant...