541 search results - page 77 / 109 » Dynamically Reconfigurable Architecture for Image Processor ... |
106
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DATE
2004
IEEE
15 years 5 months ago
2004
IEEE
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to ...
123
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HPCA
2006
IEEE
16 years 2 months ago
2006
IEEE
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...
120
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SASP
2008
IEEE
15 years 8 months ago
2008
IEEE
Ray tracing is a technique used for generating highly realistic computer graphics images. In this paper, we explore the design of a simple but extremely parallel, multi-threaded, ...
148
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DAC
2010
ACM
15 years 14 days ago
2010
ACM
A three-dimensional (3D) CMOS imager constructed by stacking a pixel array of backside illuminated sensors, an analog-to-digital converter (ADC) array, and an image signal process...
VLSID
2004
IEEE
16 years 2 months ago
2004
IEEE
: The accumulation of popular features in portable products such as mobile handsets is driving battery life to unacceptably low levels. Substantial change will not come from increm...