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IPPS
2006
IEEE
15 years 10 months ago
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
Michael Hübner, Christian Schuck, Jürgen...
IPPS
2006
IEEE
15 years 10 months ago
Placement and routing of Boolean functions in constrained FPGAs using a distributed genetic algorithm and local search
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...
Manuel Rubio del Solar, Juan Manuel Sánchez...
IPPS
2006
IEEE
15 years 10 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
IPPS
2006
IEEE
15 years 10 months ago
A hierarchical scheduling model for component-based real-time systems
In this paper, we propose a methodology for developing component-based real-time systems based on the concept of hierarchical scheduling. Recently, much work has been devoted to t...
José L. Lorente, Giuseppe Lipari, Enrico Bi...
PRDC
2006
IEEE
15 years 10 months ago
Detecting and Exploiting Symmetry in Discrete-state Markov Models
Dependable systems are usually designed with multiple instances of components or logical processes, and often possess symmetries that may be exploited in model-based evaluation. T...
W. Douglas Obal II, Michael G. McQuinn, William H....