597 search results - page 38 / 120 » E-Process Design and Assurance Using Model Checking |
DATE
2010
IEEE
15 years 7 months ago
2010
IEEE
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
115
Voted
HICSS
2003
IEEE
15 years 7 months ago
2003
IEEE
Multidimensional data models are playing an increasingly prominent role in support of day-to-day business decisions. Due to their significance in taking strategic decisions it is ...
178
Voted
DANCE
2002
IEEE
15 years 7 months ago
2002
IEEE
Modeling and formally analyzing active network systems and protocols is quite challenging, due to their highly dynamic nature and the need for new network models. We propose a wid...
124
Voted
TACAS
1998
Springer
15 years 6 months ago
1998
Springer
A state/event model is a concurrent version of Mealy machines used for describing embedded reactive systems. This paper introduces a technique that uses compositionality and depend...
119
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DAC
2006
ACM
16 years 3 months ago
2006
ACM
Formal languages are increasingly used to describe the functional requirements (specifications) of circuits. These requirements are used as a means to communicate design intent an...