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GLVLSI
2006
IEEE
95views VLSI» more  GLVLSI 2006»
15 years 4 months ago
Test generation using SAT-based bounded model checking for validation of pipelined processors
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
Heon-Mo Koo, Prabhat Mishra
DAC
1999
ACM
15 years 11 months ago
Symbolic Model Checking Using SAT Procedures instead of BDDs
Armin Biere, Alessandro Cimatti, Edmund M. Clarke,...
CLIMA
2011
13 years 10 months ago
Verifying Team Formation Protocols with Probabilistic Model Checking
Multi-agent systems are an increasingly important software paradigm and in many of its applications agents cooperate to achieve a particular goal. This requires the design of effi...
Taolue Chen, Marta Z. Kwiatkowska, David Parker, A...
MTV
2006
IEEE
138views Hardware» more  MTV 2006»
15 years 4 months ago
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs
In this paper we will present an optimized structural 01X-SAT-solver for bounded model checking of blackbox designs that exploits semantical knowledge regarding the node selection...
Marc Herbstritt, Bernd Becker, Christoph Scholl
GPCE
2009
Springer
14 years 7 months ago
Generating safe template languages
Template languages are widely used within generative programming, because they provide intuitive means to generate software artefacts expressed in a specific object language. Howe...
Florian Heidenreich, Jendrik Johannes, Mirko Seife...