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ISPD
1999
ACM
94views Hardware» more  ISPD 1999»
15 years 2 months ago
Gate sizing with controlled displacement
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
Wei Chen, Cheng-Ta Hsieh, Massoud Pedram
ISCAS
2003
IEEE
128views Hardware» more  ISCAS 2003»
15 years 3 months ago
Placement with symmetry constraints for analog layout using red-black trees
– The traditional way of approaching placement problems in computer-aided design (CAD) tools for analog layout is to explore an extremely large search space of feasible or unfeas...
Sarat C. Maruvada, Karthik Krishnamoorthy, Subodh ...
BMCBI
2010
147views more  BMCBI 2010»
14 years 10 months ago
Learning biological network using mutual information and conditional independence
Background: Biological networks offer us a new way to investigate the interactions among different components and address the biological system as a whole. In this paper, a revers...
Dong-Chul Kim, Xiaoyu Wang, Chin-Rang Yang, Jean G...
BMCBI
2007
197views more  BMCBI 2007»
14 years 10 months ago
Boolean networks using the chi-square test for inferring large-scale gene regulatory networks
Background: Boolean network (BN) modeling is a commonly used method for constructing gene regulatory networks from time series microarray data. However, its major drawback is that...
Haseong Kim, Jae K. Lee, Taesung Park
EUROPAR
2009
Springer
14 years 7 months ago
A Parallel Point Matching Algorithm for Landmark Based Image Registration Using Multicore Platform
Abstract. Point matching is crucial for many computer vision applications. Establishing the correspondence between a large number of data points is a computationally intensive proc...
Lin Yang, Leiguang Gong, Hong Zhang, John L. Noshe...