Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...
We consider a class of component-based software models with interaction style of buffered asynchronous message passing between components with ports, represented by UML-RT. After ...
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
Programmers have come to expect better integration between databases and the programming languages they use. While this trend continues unabated, database concurrency scheduling ha...
Roman Vitenberg, Kristian Kvilekval, Ambuj K. Sing...
This paper addresses the need for systematic verification of timing properties of real-time prototypes, which consist of timing constraints that must be satisfied at any given tim...