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    PATMOS
    2007
    Springer
    186views Modeling and Simulation» more  PATMOS 2007»
    Soft Error-Aware Power Optimization Using Gate Sizing
    14 years 14 days ago
    Soft Error-Aware Power Optimization Using Gate Sizing
    Download  www.cs.ucla.edu
    —Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
    Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
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