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DFT
2005
IEEE
83views VLSI» more  DFT 2005»
15 years 3 months ago
An ILP Formulation for Yield-driven Architectural Synthesis
Data flow graph dominant designs, such as communication video and audio applications, are common in today’s IC industry. In these designs, the datapath resources (e.g., adders,...
Zhaojun Wo, Israel Koren, Maciej J. Ciesielski
INFOCOM
2003
IEEE
15 years 3 months ago
Design of Light-Tree Based Logical Topologies for Multicast Streams in Wavelength Routed Optical Networks
—In this paper, we formulate an optimization problem for the design of light-tree based logical topology in Wavelength Division Multiplexing (WDM) networks. The problem is compri...
Wanjiun Liao
HPCA
2000
IEEE
15 years 2 months ago
Dynamic Cluster Assignment Mechanisms
Clustered microarchitectures are an effective approach to reducing the penalties caused by wire delays inside a chip. Current superscalar processors have in fact a two-cluster mic...
Ramon Canal, Joan-Manuel Parcerisa, Antonio Gonz&a...
FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
15 years 2 months ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
ASPLOS
1998
ACM
15 years 2 months ago
Data Speculation Support for a Chip Multiprocessor
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
Lance Hammond, Mark Willey, Kunle Olukotun