1707 search results - page 182 / 342 » Early Integer Programming |
EURODAC
1994
IEEE
15 years 6 months ago
1994
IEEE
We consider a switch module routing problem for symmetric array FPGAs. The work is motivated by two applications. The rst is that of eciently evaluating switch module designs [8]...
111
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ICCAD
1994
IEEE
15 years 6 months ago
1994
IEEE
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
143
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VLSID
2010
IEEE
15 years 6 months ago
2010
IEEE
A novel design approach for simultaneous power and stability (static noise margin, SNM) optimization of nanoCMOS static random access memory (SRAM) is presented. A 45nm single-end...
122
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GLOBECOM
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract--Power-awareness in networking attracts more attention as the trends in the energy consumption of the Internet raise growing concerns about the environmental impacts and s...
122
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CONCUR
2006
Springer
15 years 6 months ago
2006
Springer
We describe an incomplete but sound and efficient livelock freedom test for infinite state asynchronous reactive systems. The method s a system into a set of simple control flow cy...