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CASES
2010
ACM
14 years 7 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
HIPC
2009
Springer
14 years 7 months ago
Integrating and optimizing transactional memory in a data mining middleware
As the size of available datasets in various domains is growing rapidly, there is an increasing need for scaling data mining implementations. Coupled with the current trends in co...
Vignesh T. Ravi, Gagan Agrawal
CCGRID
2005
IEEE
15 years 3 months ago
P3: P2P-based middleware enabling transfer and aggregation of computational resources
This paper presents middleware enabling mutual and equal transfer of computing power between individuals, as in the original idea behind P2P, while also supporting large-scale dis...
Kazuyuki Shudo, Yoshio Tanaka, Satoshi Sekiguchi
IPPS
2010
IEEE
14 years 7 months ago
Acceleration of spiking neural networks in emerging multi-core and GPU architectures
Recently, there has been strong interest in large-scale simulations of biological spiking neural networks (SNN) to model the human brain mechanisms and capture its inference capabi...
Mohammad A. Bhuiyan, Vivek K. Pallipuram, Melissa ...
LCTRTS
2009
Springer
15 years 4 months ago
Addressing the challenges of DBT for the ARM architecture
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
Ryan W. Moore, José Baiocchi, Bruce R. Chil...