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ISCAS
2007
IEEE
15 years 4 months ago
2007
IEEE
Abstract— Parallel time-interleaved analog-to-digital converters (TIADCs) are an attractive architecture to realize low-power and high-speed data conversion. As a drawback of suc...
AE
2007
Springer
15 years 3 months ago
2007
Springer
The evaluation or fitness function is a key component of any heuristic search algorithm. This paper introduces a new evaluation function for the well-known graph K-coloring proble...
ATC
2007
Springer
15 years 3 months ago
2007
Springer
We present a system architecture for trusted transactions in highly sensitive environments. This architecture takes advantage of techniques provided by the Trusted Computing Group ...
ACSAC
2006
IEEE
15 years 3 months ago
2006
IEEE
This work introduces the A system1 , an Internetbased, free and open source electronic voting system which employs strong cryptography. Our system is a fully functiona...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
Bulk Synchronous Parallel ML (BSML) is an extension of the functional language Objective Caml to program Bulk Synchronous Parallel (BSP) algorithms. It is deterministic, deadlock ...