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DAC
2003
ACM
16 years 22 days ago
Performance-impact limited area fill synthesis
Chemical-mechanical planarization (CMP) and other manufacturing steps in very deep-submicron VLSI have varying effects on device and interconnect features, depending on the local ...
Yu Chen, Puneet Gupta, Andrew B. Kahng
ICCD
2005
IEEE
110views Hardware» more  ICCD 2005»
15 years 8 months ago
Implementing Caches in a 3D Technology for High Performance Processors
3D integration is an emergent technology that has the potential to greatly increase device density while simultaneously providing faster on-chip communication. 3D fabrication invo...
Kiran Puttaswamy, Gabriel H. Loh
IPSN
2009
Springer
15 years 6 months ago
Predictive QoS routing to mobile sinks in wireless sensor networks
We present an algorithm for data delivery to mobile sinks in wireless sensor networks. Our algorithm is based on information potentials, which we extend to account for mobility. W...
Branislav Kusy, HyungJune Lee, Martin Wicke, Nikol...
PAM
2009
Springer
15 years 6 months ago
Triangle Inequality and Routing Policy Violations in the Internet
Triangle inequality violations (TIVs) are the effect of packets between two nodes being routed on the longer direct path between them when a shorter detour path through an intermed...
Cristian Lumezanu, Randolph Baden, Neil Spring, Bo...
88
Voted
GLOBECOM
2009
IEEE
15 years 6 months ago
Distortion Prediction for Video Quality Optimization over Packet Switched Networks
—Scheduling techniques are often deployed at the network edge to maximize the quality of the video communication while satisfying a given constraint on the maximum high priority ...
Andrea Vesco, Enrico Masala, Carlo Novara